A gate insulator film of a MIS (metal/insulator film/silicon) type transistor produced by using a silicon single crystal wafer is required to have high-performance electric properties such as low leakage current characteristics, low interface state density, and high carrier injection resistance, and high reliability. As a technique for forming a gate insulator film (mainly, a silicon oxide film) satisfying these requirements, there has conventionally been utilized a thermal oxidation technique using oxygen molecules or water molecules at 800° C. or higher.
Conventionally, when a silicon wafer having a {100} plane or a silicon wafer having a plane orientation tilting about 4° from a {100} plane is used, there can be obtained good oxide film/silicon interface characteristics, oxide dielectric breakdown voltage characteristic and leakage current characteristic by using the thermal oxidation technique. This is caused by the fact that the interface state of the gate oxide film formed on a {100} plane is lower than the other crystal planes. If a gate oxide film is formed on a silicon wafer having a plane orientation other than that mentioned above by using the thermal oxidation technique, electric properties are degraded, that is, the interface state density of an oxide film/silicon interface becomes high, the oxide dielectric breakdown voltage characteristic and leakage current characteristic are degraded, and so forth.
Therefore, for a silicon wafer on which a MIS type semiconductor device as represented by a so-called MOS (metal/silicon oxide film/silicon) type transistor is formed, a silicon wafer having a {100} plane or a silicon wafer having a plane orientation tilting about 4° from a {100} plane has conventionally been used.
Recently, the technique for forming an insulator film of good quality irrespective of the plane orientation of a silicon wafer surface was developed (see 2000 Symposium ON VLSI Technology, Honolulu, Hi., Jun. 13-15, 2000 “Advantage of Radical Oxidation for Improving Reliability of Ultra-Thin Gate Oxide”). Therefore, it can be said that, according to such a technique, it is not necessary to limit the plane orientation of wafers for the production of MIS type semiconductor devices to the {100} plane.
On the other hand, it has been revealed that carrier mobility in the channel direction of MISFET may be twice or more in a certain direction of a wafer-having a {110} plane, and thus, current between a source and a drain is increased.
Therefore, it can be conceived that in order to fabricate a MIS device, if a gate insulator film is formed by using a silicon single crystal wafer having a {110} plane with a technique for forming a good insulator film irrespective of the plane orientation as aforementioned, a MIS type device having unprecedented good characteristics can be fabricated.